Introduction to VLSI and SOC Design

教學目標:

Good understanding and design experience of VLSI and SOC design including transistor modeling, circuit-level scheme, architecture-level scheme, design space exploration, reuse methodology through the case studies of the multimedia-communications SOC system.

課程綱要

Lecture 0 Syllabus

Lecture 1 Welcome to VLSI

Lecture 2 Devices

Lecture 3 Speed

Lecture 4 Power

Lecture 5 Wire

Lecture 6 Scaling and Reliability

Lecture 7 SPICE

Lecture 8 Gates

Lecture 9 Sequencing

Lecture 10 Datapaths

Lecture 11 Memories

Lecture 12 Methodology

News Content Deadline / Date
update web online 9/18
update Lecture 00 update 9/18
update Lecture 01 update 9/18
update Lecture 02 update
update Lecture 03 update
update Midterm 2013/11/8
update Homework 1: 3.1 and 3.13 2013/11/8
update Homework 2: 3.11, 3.19 2013/11/22
update Homework 3: 4.2 2013/11/29
update Homework 4: 8.1 2013/12/27
update Homework 5: 9.3 2014/1/24
update Final exam 範圍: Lecture 8 , Gates Lecture 9 , Sequencing Lecture , 10 Datapaths 2014/1/17 CD兩節課
update Final grade view 2014/1/29

 

Teaching Assistant:

吳宗翰 stevensuperboy@gmail.com

Phone: 03-5712121-59283

Last Update: 9/18, 2013

Office Hour: please contact TA